Electroplated “as plated” (non-reflowed) bumps range in height from two (2) microns tall to one hundred seventy (170) microns in height.  Typical bump diameters are between ten (10) microns and one hundred twenty-five (125) microns depending on pitch and design requirements.  Aspect ratios can vary depending upon pitch and design requirements. All wafer bumping utilizes multiple sputtered UBM layers followed by the application, exposure and development of either positive or negative toned liquid photoresist(s).

IMI’s process line(s) can accommodate seventy-five millimeter (75mm) through two hundred millimeter (200mm) SEMI Std. Silicon, Pyrex, Gallium–Arsenide, Gallium-Nitride, SiGe, Silicon-Carbide, Lithium-Niobate and other compound semiconductor wafers in both development/prototyping and full production modes.

A unique advantage to IMI’s copper pillar bump technology is the ability to eliminate the need for traditional wafer level flux/reflow/clean step(s) when using solder or solderable alloys to facilitate first level interconnect.  IMI delivers copper pillar bumps with “as plated” solder alloy caps with enough uniformity to allow our customers to eliminate these customary wafer level reflow steps.

IMI’s solder deposition process yields a uniform, consistent, contaminant and void free solder bump.  The same “as plated” process technology is employed for IMI’s traditional (non-pillar bump) solder bump process as well (see below).  This affords IMI’s flip-chip customers the advantage of introducing non-reflowed, “as plated” solder alloy bumps directly into their assembly equipment and perform reflow and bonding all at the assembly step.

Again, IMI’s tightly controlled alloy deposition and superior “as plated” bump height tolerance allows this to be performed without traditional offline reflow, eliminating process steps, increasing throughput and yield while reducing solder fatigue.  This approach has been one hundred percent successful on every program to which it has been introduced.

Using IMI’s solder bumps, this technique is presently being employed for the ongoing commercial manufacture of what is currently the smallest flip chip device presently in production world-wide.

IMI has anticipated the exit of a major solder bump foundry provider and is offering an advanced solder bump configuration specifically designed to meet program requirements as an interim step between traditional high-lead reflowed solder bumps and IMI’s copper pillar bumps.

Incorporating its “as plated” solder bump technology (described above) IMI is now offering current high-lead users an as plated bump alternative to replace other aging solder bump technologies.  This advance addresses the limitations of old technologies that used electroplating techniques that had difficulty achieving fine pitches and uniform deposits.

IMI offers these customers electroplated bumps of nickel (1-5 microns high) topped with 5/95 high lead solder alloy (75-100+ microns high) in various geometries.  Like IMI’s pillar bumps, these bumps offer tightly controlled alloy deposition, flat tops to facilitate efficient testing and the elimination of traditional off-line flux, reflow and clean steps.

This technology is currently being migrated into those programs facing the anticipated obsolescence of their current solder bump supply.  IMI’s high-lead solder bump technology is a reliable solder bump upgrade offering the least disruption to the process supply-chain while enabling future higher performing packaging options.

IMI provides custom bumped mechanical test wafers and chips for advanced development, assembly pilot testing and bonding/placement/reflow equipment test and certification.

Giving our customers the ability to test the mechanical properties of multiple bump metals, alloys, geometries and bump pitch on mechanical samples, early in the product design process, eliminates costly mistakes and reduces overall time to market.

IMI does bump processing on BCB passivated and other types of polyimide and nitride/oxide coated wafers having been redistributed.  Redistribution of metal pads to a different area of the chip is provided by sputtering or plating then etching lines and landing pads.  IMI can work with your supply chain to facilitate the coating of BCB (and alike) passivation and the opening of passivation windows over the newly rerouted landing pads in preparation for IMI’s bump process.

Working closely with our customer’s packaging engineers IMI is able to provide valuable input for new package/product development. Our knowledge of bump processing, manufacturability and ability to provide mechanical test chips significantly reduces prototype iterations and increases the likely result of a commercially manufacturable process being easily integrated into an efficient supply chain.

IMI does not provide general design rules for bump/package applications.  Each application is studied on an individual basis and a decision is made together with the customer to determine the most efficient application of IMI’s technology.  It has been our experience that a standardized approach to design rules most often does not provide the customer with the most advanced package solution and as such brings less value to the proposition.